OpenPOWER Acceleration 2017-08-18T08:20:40+00:00

OpenPOWER Overview

Nallatech has been a contributing member of the OpenPOWER Foundation since its founding moment back in 2013. As an open technical membership organization the OpenPOWER Foundation enables data centers to rethink their approach to technology. Member companies are enabled to customize POWER CPU processors and system platforms for optimization and innovation for their business needs. These innovations include custom systems for large or warehouse scale data centers, workload acceleration through GPU, FPGA or advanced I/O, platform optimization for SW appliances, or advanced hardware technology exploitation. OpenPOWER members are actively pursuing all of these innovations and more and welcome all parties to join in moving the state of the art of OpenPOWER systems design forward. OpenPOWER Intro Video. Click here to view Nallatech’s latest OpenPOWER Ready product.

Nallatech CAPI SNAP Enabled Near-Storage FPGA Accelerator

250S+

The all new Nallatech 250S+ supplies twice the amount of onboard memory, as well as offers a cabled feature for external storage up to 25.6TB. The 250S+ is ideal for OpenPOWER applications, including database acceleration, inline compression, inline encryption, checkpoint restarting and burst buffer caching. This new board offers in-memory FPGA acceleration and now supports the next level of programmability for developers.

Nallatech 250S+ with Xilinx Ultrascale+ FPGA AccelerationThe API makes it easy for an application to call an accelerated function. The simple API has three parameters: the source data; the accelerated action to be performed; and the destination for the action output.

The FPGA framework logic implements all of the computer engineering interface logic, data movement, caching, and pre-fetching work–leaving the programmer to focus on their accelerator functionality, or “Action Code” on the FPGA. The framework takes care of retrieving the source data (whether it is in system memory, Local FPGA Memory or NVMe storage). as well as sending the results to the specified destination. The programmer, writing in a high level language such as C/C++ or Go, needs only to write their data transform, or “action code”. Framework compatible compilers translate the high-level language to Verilog, which in turn gets synthesized using Xilinx’s Vivado toolset.

250S

With the launch of OpenPOWER’s open source CAPI SNAP Framework; Nallatech’s 250S in-memory FPGA accelerator now supports the next level of programmability for developers.

Nallatech 250S - In-Memory FPGA AccelerationThe CAPI SNAP framework consist of an API running in the IBM POWER 8 host and an FPGA Firmware Framework that resides within the FPGA on Nallatech’s 250S in-memory FPGA accerlator card.

The API makes it easy for an application to call an accelerated function. The simple API has three parameters: the source data; the accelerated action to be performed; and the destination for the action output.

The FPGA framework logic implements all of the computer engineering interface logic, data movement, caching, and pre-fetching work–leaving the programmer to focus on their accelerator functionality, or “Action Code” on the FPGA. The framework takes care of retrieving the source data (whether it is in system memory, Local FPGA Memory or NVMe storage). as well as sending the results to the specified destination. The programmer, writing in a high level language such as C/C++ or Go, needs only to write their data transform, or “action code”. Framework compatible compilers translate the high-level language to Verilog, which in turn gets synthesized using Xilinx’s Vivado toolset.

For more information see https://developer.ibm.com/linuxonpower/capi/snap/

OpenPOWER
OpenPOWER
OpenPOWER
OpenPOWER

What is CAPI?

IBM developed the Coherent Accelerator Processor Interface (CAPI) as a new means for solution architects to improve system-level performance.

Most FPGA Accelerators utilize PCIe as their link to the host. CAPI provides a unique alternative, allowing the FPGA accelerator to coherently attach to the fabric of a POWER8™ chip and up to 1 TB of system memory.

This new hybrid solution has a simple programming paradigm while delivering algorithm acceleration and performance well beyond what’s available today.

OpenPOWER
OpenPOWER

Learn More About CAPI

How is Nallatech involved?

Nallatech’s 385 card is the first supported CAPI FPGA accelerator card.

Through our membership in the OpenPOWER™ Foundation, we have collaborated with IBM and Altera to provide the OpenPOWER CAPI Developer Kit for POWER8, which includes everything needed to start developing with CAPI in a POWER8 System.

Nallatech is also working with select partners and OpenPOWER members on custom hardware and CAPI enabled solutions.

Nallatech’s CAPI Developer Kit Contents

Hardware Components
Software / IP Components
Tools
Documentation
Included in CAPI Developer Kit Nallatech 385 FPGA Accelerator IBM CAPI Power Service Layer (PSL) (Encrypted FPGA IP) Altera Quartus FPGA Tools White Paper and Decision Guide
Nallatech JTAG Debug Kit CAPI Host Support Library (libcxl) PSL Simulation Engine CAPI User’s Guide
‘Memcopy’ Example 385 FPGA Card User Guide
Also Required Any CAPI Enabled POWER8 systems, including the L and LC lines CAPI Enabled O/S
Ubuntu 14.10 LE  / Redhat 7.3, or later versions
HDL Simulator
(i.e. Cadence, Mentor, Synopsis)

 

How do I get started?

Contact Nallatech today for additional information or to request a quote for the POWER8 CAPI Developer Kit.

We are happy to discuss how your specific application can benefit by leveraging CAPI solution.

You can also explore CAPI at a more technical level:

Take a Deeper Technical Dive

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