OPERA Project – Improving computational energy efficiency

OPERA Project – Improving computational energy efficiency through low power consumption systems

OPERA Project – LOw Power Heterogeneous Architecture for NExt generation of SmaRt infrastructure and Platforms in Industrial and Societal Applications. The OPERA project is co-funded by the European Union’s HORIZON 2020 Framework Programme for Research and Innovation. A new generation of low power consumption systems to improve computational energy efficiency through the development of heterogeneous architectures, distributing the workload according to applications and server technology.

View All Nallatech FPGA Cards

FPGA Accelerated Compute Node
FACN

FPGA Accelerated Compute Node – with up to (4) 520s

520 – with Stratix 10 FPGA
520

Compute Accelerator Card
w/Stratix 10 FPGA

510T - Compute Accelerator with Arria 10 FPGA
510T

 Nallatech 510T
w/(2) Arria 10  FPGAs

385A - Network Accelerator with Arria 10 FPGA
385A

 Nallatech 385A – w/Arria10 / GX1150 FPGA

2018-04-11T06:52:49+00:00
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